A printed circuit board (PCB) mechanically supports and electrically connects electronic components using conductive traces, pads and other features etched from electrically conductive sheets, such as copper sheets, laminated onto a non-conductive substrate. Multi-layered printed circuit boards are formed by stacking and laminating multiple such etched conductive sheet/non-conductive substrate laminations. Conductors on different layers are interconnected with plated-through holes called vias.
FIG. 1 illustrates a cut out side view of a portion of a conventional printed circuit board. The printed circuit board 2 includes a plurality of stacked layers, the layers made of non-conductive layers 4, 6 and conductive layers 8. The non-conductive layers can be made of prepreg or base material that is part of a core structure, or simply core. Prepreg is a fibrous reinforcement material impregnated or coated with a thermosetting resin binder, and consolidated and cured to an intermediate stage semi-solid product. Prepreg is used as an adhesive layer to bond discrete layers of multilayer PCB construction, where a multilayer PCB consists of alternative layers of conductors and base materials bonded together, including at least one internal conductive layer. A base material is an organic or inorganic material used to support a pattern of conductor material. A core is a metal clad base material where the base material has integral metal conductor material on one or both sides. A laminated stack is formed by stacking multiple core structures with intervening prepreg and then laminating the stack. A via 10 is then formed by drilling a hole through the laminated stack and plating the wall of the hole with electrically conductive material, such as copper. The resulting plating 12 interconnects the conductive layers 8.
In the exemplary application shown in FIG. 1, the plating 12 extends uninterrupted through the entire thickness of the via 10, thereby providing a common interconnection with each and every conductive layer 8. In other applications, it may be desired that only certain conductive layers be commonly interconnected by the plating within the via. The commonly interconnected layers are referred to as segments. Formation of segments requires a break in the via wall plating, however, the plating process that forms the plating on the via walls is commonly applied to the entire wall surface. Therefore, to form the necessary plating breaks, the printed circuit board is formed as separate sub-assembly stacks that are laminated together. Each sub-assembly laminated stack has the desired plated via, but when laminated together the plated vias from each sub-assembly laminated stack are separated by a non-conductive material that forms a break in the overall via wall plating. FIG. 2 illustrates a cut out side view of a portion of two conventional sub-assembly stacks that are to be subsequently used to form a printed circuit board. A sub-assembly laminated stack 20 includes non-conductive layers 24, 26 and conductive layers 28. The non-conductive layers 24 and the conductive layers 28 form core structures, which are laminated together with intervening non-conductive layer 26, such as prepreg. A via 22 is formed by drilling a hole through the laminated stack and plating the wall of the hole with electrically conductive material. The resulting plating interconnects the conductive layers 28. A second subassembly laminated stack 30 is similarly formed and includes a laminated stack of non-conductive layers 34, 36 and conductive layers 38, and plated via 32. To form the completed printed circuit board, the two subassemblies 20 and 30 are stacked such that the corresponding vias 22 and 32 are aligned, and laminated together with intervening non-conductive layer 40, as shown in FIG. 3. The non-conductive layer 40 provides a break in the conductive plating of via 22 and the conductive plating of via 32, thereby forming two separate segments in the printed circuit board of FIG. 3.
The process shown in FIGS. 2 and 3 is referred to as sequential lamination. A problem with sequential lamination is that it is difficult to exactly align the vias of the stacked subassemblies. As shown in FIG. 3, a via center line 42 of the via 22 in subassembly 20 is not exactly aligned with a via center line 44 of the via 32 in subassembly 30. This is known as layer to layer mis-registration and can lead to performance issues.
In some applications, one or more of the conductive layers closest to the top or bottom surface of the printed circuit board are not designed to be interconnected to the via plating. To sever this connection for these one or more conductive layers, a back drill process is performed where the hole is drilled into the printed circuit board at the via. The hole diameter is wider than the via diameter such that the drilled hole removes the wall plating thereby removing the interconnect plating between conductive layers. FIG. 4 illustrates a cut out side view of a portion of a conventional circuit board having the via back drilled. The printed circuit board 52 is similar to the printed circuit board 2 of FIG. 1 except that a hole 64 has been back drilled into the printed circuit board 52. The back drilled hole 64 removes the corresponding portion of the plating 62 in the via 60 co-located with the bottom few layers of the printed circuit board 52. The remaining plating 62 provides an interconnect for the conductive layers 58, however, the bottom most conductive layers 58′ are no longer interconnected to the conductive layers 58 since the interconnect plating 62 is removed in the hole 64. It is important that the back drilling process leaves intact the conductive layers 58, which results in a via stubs 66 extending from the last interconnected conductive layer 58. A via stub is a conductive portion of the via that is not connected in series with the electrical circuit. The longer the via stub, the greater the signal reflection and degradation. As such, it is desirable to minimize the length of the via stub. However, conventional back drilling processes have high variability and are difficult to control the length of the via stub. Additionally, back drilling is time consuming and expensive.